fig5

Figure 5. Effect of multiple polarization states on electrical transport of CIPS/AIPS VFSH device. (A) Schematic diagram of CIPS/AIPS transistor structure; (B) I_ds-V_ds curves of CIPS/AIPS device in four polarization states; (C) Transmission spectra of CIPS/AIPS device in four polarization states; (D) TER of CIPS/AIPS device as a function of V_ds; (E) I_ds of CIPS/AIPS device in four polarization states at V_ds = 1.5 V. The I_ds of four polarization states is larger than 10 nA as the logic output “1” and lower than 10 nA as the logic output “0”; (F) Truth table of XNOR logic operation. Here +V_TG and +V_BG represent logic input “1”, and -V_TG and -V_BG represent logic input “0”. CIPS/AIPS: CuInP₂S₆/AuInP₂S₆; VFSH: vdW FE semiconductor heterojunction; TER: tunneling electroresistance ratio.